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Contact Christine Gonzalez at cgonzalez@saigpartners.com, you can also schedule an appointment,  to learn more about this opportunity!

Senior High-Speed Mixed-Signal / Analog IC Layout Engineer (San Jose, CA)

As an Analog Layout Engineer, you will be responsible for:
• Layout of Analog / High Speed transceiver circuit blocks such as amplifiers, drivers, ADC, DAC, LDO, PLL, filters, etc. in a timely manner.
• Layout of sensitive active / passive components including resistors, capacitors and inductors.
• Design verification including DRC, LVS, ERC and ANT and extraction.
• Block level floor planning with design engineers. • Review and update layout for quality including signal integrity, power integrity and parasitic.
Requirements:
Associate degree or above with formal training in custom analog layout; BSEE or above preferred
The ideal candidate will have the following qualifications:
• 5+ years analog layout experience in deep sub-micron and FinFET processes.
• Experience in floor planning and layout of analog blocks such as amplifiers, drivers, ADC, DAC, LDO, PLL, filters, etc.
• Solid knowledge in device structures.
• Understand tradeoffs in matching, coupling, parasitic effects, area, etc.
• Understand causes and preventions of ESD and latch-up.
• Proficient in interpreting verification DRC, LVS, ERC, ANT results.
• Working knowledge of Cadence Virtuoso and Mentor Calibre required.
• Team player with excellent communication skills.

Saige Partners, one of the fastest growing technology and talent companies in the Midwest, believes in people with a passion to help them succeed. We are in the business of helping professionals Build Careers, Not Jobs. Saige Partners believes employees are the most valuable asset to building a thriving and successful company culture. Contact us to learn more about the opportunity below or check out other opportunities at https://careers.saigepartners.com/.